CMOS Image Sensor Having improved signal eficiency and method for manufacturing the same

ABSTRACT

A CMOS image sensor and a method for manufacturing the same improves signal efficiency by reducing a dark signal, and includes a substrate having a first conductive type comprising an image area and a circuit area, a STI isolation layer in the substrate for electrical isolation within the circuit area, and a field oxide in the substrate for electrical isolation within the image area.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of Korean Patent Application No.P2004-116418, filed on Dec. 30, 2004, which is hereby incorporated byreference for all purposes as if fully set forth herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a CMOS image sensor and a method forfabricating the same.

2. Discussion of the Related Art

FIG. 1 illustrates a cross sectional view of a CMOS image sensoraccording to the related art. FIG. 2 illustrates a cross sectional viewof an active region in a CMOS image sensor according to the related art.

As shown in FIG. 1 and FIG. 2, a p-type well 2 is formed in a p-typesubstrate 1. Also, shallow trench isolation STI regions 3 are formed ina surface of the p-type well 2 for electric isolation of pixels.

Then, an N-type photodiode 5 is formed inside the P-type well 2 in eachof cell regions 4. Also, impurity regions 6 are formed in the surface ofthe P-type well 2 adjacent to the N-type photodiode 5, wherein theimpurity regions 6 serve as source and drain regions.

Subsequently, a poly-silicon gate electrode 7 is formed on the surfaceof the P-type well 2 in correspondence with the impurity regions 6. Inthe drawings, a voltage source Vc applies a voltage to the impurityregions 6, and a gate insulating layer 8 is provided.

As designs become smaller when forming the poly-silicon gate electrodefor a CMOS transistor according to the related art, shallow trenchisolation (STI) is often used to isolate the pixels from one another.

STI, trenches are formed in the surface of the P-type well 2, and thenoxide layers are grown or deposited into the trenches. After that, anetch-back process is performed to the oxide layers, whereby isolationlayers are formed in the trenches for isolation of the pixels.

However, when etching the surface of the flat silicon substrate 1,crumpled portions may be generated. In this case, mechanical andelectrical stresses may be generated in a tilted or crumpled surfacebetween the oxide layer inside the trench and the silicon substrate 1,thereby causing an increase in defect density. Accordingly, a leakagecurrent occurs in the CMOS image sensor, and a dark defect occurs inimages.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to a CMOS image sensorand a method for manufacturing the same that substantially obviates oneor more problems due to limitations and disadvantages of the relatedart.

The present invention provides a CMOS image sensor having an improvedsignal efficiency in low light circumstances by reducing a dark signal.

Additional advantages and features of the invention will be set forth inthe description which follows and will become apparent to those havingordinary skill in the art upon examination of the following. These andother advantages of the invention may be realized and attained by thestructure particularly pointed out in the written description and claimshereof as well as the appended drawings.

To achieve these and other advantages and in accordance with the purposeof the invention, as embodied and broadly described herein, there isprovided a CMOS image sensor including a substrate having a firstconductive type comprising an image area and a circuit area, a STIisolation layer in the substrate for electrical isolation within thecircuit area, and a field oxide in the substrate for electricalisolation within the image area.

A gate electrode comprising a gate oxide and a polysilicon gate can beformed on the circuit area of the substrate. Both side portions of thegate oxide can be formed on the field oxide.

In another aspect of the present invention, there is provided a methodfor manufacturing a CMOS image sensor including the steps of forming aSTI isolation layer in a substrate of a first conductive type, whereinthe substrate comprises an image area and a circuit area and the STIisolation layer is for electrical isolation within the circuit area. Themethod can further include forming a field oxide in the substrate forelectrical isolation within the image area.

The field oxide formation can comprise the steps of forming a pad oxideon the substrate, forming a nitride on the pad oxide, selectivelyetching the nitride and pad oxide sequentially so that a portion of thesubstrate where the field oxide is to be formed is exposed, and forminga thermal oxide on the exposed portion of the substrate by performingthermal oxidation process on the entire substrate.

The method can further comprise a step of forming a gate electrode onthe circuit area of the substrate. The gate electrode formation cancomprise the steps of forming a CVD oxide layer on the entire surface ofthe substrate, including the thermal oxide by performing CVD process;forming a polysilicon layer on the CVD oxide layer; and selectivelyetching the polysilicon layer and CVD oxide layer sequentially in such away that at least a portion of remained CVD oxide layer overlaps withthe thermal oxide.

It is to be understood that both the foregoing general description andthe following detailed description of the present invention areexemplary and explanatory and are intended to provide furtherexplanation of the invention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a furtherunderstanding of the invention illustrate exemplary embodiments of theinvention and together with the description serve to explain theprinciple of the invention. In the drawings:

FIG. 1 is a cross sectional view of a CMOS image sensor according to therelated art;

FIG. 2 is a cross sectional view illustrating an active region in a CMOSimage sensor according to the related art;

FIG. 3 is a cross sectional view of a CMOS image sensor according to anexemplary embodiment of the present invention; and

FIG. 4A to 4F are cross sectional views of a CMOS image sensorfabricated using a method according to an exemplary embodiment of thepresent invention.

DETAILED DESCRIPTION OF THE INVENTION

Reference will now be made in detail to the preferred embodiments of thepresent invention, examples of which are illustrated in the accompanyingdrawings. Wherever possible, the same reference numbers will be usedthroughout the drawings to refer to the same or like parts.

FIG. 3 illustrates a cross sectional view of a CMOS image sensoraccording to the present invention.

As shown in FIG. 3, a P-type well (not shown) is formed in a P-typesubstrate 10. Also, channel stop regions CS 12 are formed in a surfaceof the P-type well 11, wherein the channel stop regions CS function asisolation regions for electrically isolating pixels from one another.The channel stop regions CS 12 are formed by forming field oxide layers(not shown) in field regions of the substrate 10 through a LOCOS (LocalOxidation of Silicon) process and then implanting channel stop ions tothe portions of the substrate 10 below the field oxide layers. A N-typephotodiode 19 and a source/drain region 20 are respectively formed inthe P-type well of each of the pixel areas. A polysilicon gate 16 a isformed on the source/drain region 20. A voltage source Vd for applying avoltage to the source/drain region 20 and a gate oxide 15 a areprovided.

FIG. 4A to 4F are cross sectional views illustrating processes formaking an active region in a CMOS image sensor according to the presentinvention.

As shown is FIG. 4A, a P-type well is formed in a P-type substrate 10 byimplanting P-type ions thereto. A pad oxide layer 11 and nitride layer12 are sequentially formed on the P-type well. A photoresist pattern 13is then formed on the nitride layer 12 to expose a portion of thenitride layer 12 corresponding to field regions.

Referring to FIG. 4B, a pad oxide pattern 11 a and a nitride pattern 12a are formed by selectively etching the pad oxide layer 11 and nitridelayer 12 using the photoresist pattern 13 as a mask and then strippingthe photoresist pattern 13.

Referring to FIG. 4C, a field oxide 14 is formed on the exposed portionof the substrate 10 by performing a thermal oxidation process.Subsequently, the nitride pattern 12 a and pad oxide pattern 11 a areremoved.

Referring to FIG. 4D, a CVD process is performed on the entire surfaceof the substrate 10, including the field oxide 14, to form a gate oxidelayer 15 thereon. Then, a polysilicon layer 16 is deposited on the gateoxide layer 15.

As shown in FIG. 4E, after a photoresist pattern 17 is formed on thepolysilicon layer 16 in such a way that a portion of the polysiliconlayer 16 corresponding to the field oxide 14 is exposed, channel stopions of high density are implanted using the photoresist pattern 17 as amask. The channel stop ions are the same conductive type as thesubstrate 10, that is, P-type. Consequently, the implanted channel stopions constitute a P-type ion area 18 below the field oxide 14, whichconstitute a channel stop region together with the field oxide 14.

Referring to FIG. 4F, the polysilicon layer 16 and gate oxide layer 15are selectively etched using the photoresist pattern 17 as a mask. As aresult, a gate oxide 15 a and a polysilicon gate 16 a are formed on thecircuit area of the substrate 10. According to an exemplary embodimentof the present invention, the gate oxide 15 a is formed in such a waythat both sides of the gate oxide 15 a overlap with the field oxide 14.

Subsequently, N-type photodiode 19 (see FIG. 3) and source/drain region20 (see FIG. 3) are sequentially formed using a conventional process.

In forming the isolation regions for the CMOS image sensor according tothe present invention, the oxide layers are formed in the pixels by gateoxide and CVD oxide deposition instead of a shallow trench isolation STIprocess according to the related art.

Accordingly, a silicon substrate etching process required for performinga STI process can be avoided, at least in the inner area of thesubstrate corresponding to each pixel. Thus, it is possible to minimizea stress between the oxide layer and the silicon substrate.

Using the gate oxide and CVD oxide, a threshold voltage is increased inthe field region contrary to an active region for forming a transistorto result in no effect on the operation of a circuit. That is, while therelated art STI process is still used in the circuit area, the STIprocess is replaced with LOCOS process in the imaging area.

In the CMOS image sensor according to the present invention, it ispossible to decrease a parasitic capacitance between the poly-silicongate electrode and the substrate, thereby decreasing noise caused bycoupling.

Also, it is possible to minimize the surface deformation of the siliconsubstrate when performing the process for isolation of the pixels,thereby decreasing a dark signal and a dark defect.

It will be apparent to those skilled in the art that variousmodifications and variations can be made in the present inventionwithout departing from the spirit or scope of the inventions. Thus, itis intended that the present invention covers the modifications andvariations of this invention provided they come within the scope of theappended claims and their equivalents.

1-18. (canceled)
 19. A CMOS image sensor comprising: a substrate havinga first conductive type and comprising an image area and a circuit area;a LOCOS field oxide in the substrate for electrical isolation within theimage area; a channel stop ion area below the LOCOS field oxide; and agate electrode on the circuit area of the substrate, the gate electrodehaving a gate oxide on the circuit area and a polysilicon gate on thegate oxide, the gate oxide being formed in such a way that both sides ofthe gate oxide and the polysilicon gate overlap with the LOCOS fieldoxide.
 20. The CMOS image sensor of claim 19, wherein the field oxidecomprises a thermal oxide, and the CMOS image sensor further comprises aCVD oxide formed on an edge portion of the field oxide.
 21. The CMOSimage sensor of claim 19, wherein the gate oxide comprises a CVD oxideand has side portions formed on the field oxide.
 22. The CMOS imagesensor of claim 19, further comprising a well having the firstconductive type in the substrate.
 23. The CMOS image sensor of claim 19,further comprising a photodiode having a second conductive type in theimage area of the substrate.
 24. The CMOS image sensor of claim 23,wherein the first conductive type is P-type and the second conductivetype is N-type.
 25. The CMOS image sensor of claim 19, wherein thechannel stop ion has the first conductive type.
 26. A CMOS image sensorcomprising: a substrate having a first conductive type and comprising animage area and a circuit area; a LOCOS field oxide in the substrate forelectrical isolation within the image area; a channel stop ion areadirectly below the LOCOS field oxide, in the substrate; and a gateelectrode on the circuit area of the substrate, the gate electrodehaving a gate oxide on the circuit area and a polysilicon gate on thegate oxide, the gate oxide being formed in such a way that both sides ofthe gate oxide and the polysilicon gate overlap with the LOCOS fieldoxide.